TEN=0, TFC=0, TMS=0, TPP=0, TIE=0, TPS=00, TCF=0
Low Power Timer Control Status Register
TEN | Timer Enable 0 (0): LPTMR is disabled and internal logic is reset. 1 (1): LPTMR is enabled. |
TMS | Timer Mode Select 0 (0): Time Counter mode. 1 (1): Pulse Counter mode. |
TFC | Timer Free-Running Counter 0 (0): CNR is reset whenever TCF is set. 1 (1): CNR is reset on overflow. |
TPP | Timer Pin Polarity 0 (0): Pulse Counter input source is active-high, and the CNR will increment on the rising-edge. 1 (1): Pulse Counter input source is active-low, and the CNR will increment on the falling-edge. |
TPS | Timer Pin Select 0 (00): Pulse counter input 0 is selected. 1 (01): Pulse counter input 1 is selected. 2 (10): Pulse counter input 2 is selected. 3 (11): Pulse counter input 3 is selected. |
TIE | Timer Interrupt Enable 0 (0): Timer interrupt disabled. 1 (1): Timer interrupt enabled. |
TCF | Timer Compare Flag 0 (0): The value of CNR is not equal to CMR and increments. 1 (1): The value of CNR is equal to CMR and increments. |